Lateral tapered active field-plate LDMOS device for 20V application in thin-film SOI

Abstract

We present a new device design for 20V application in thin body SOI technology. High breakdown voltage is achieved by forming RX-bound field plates which deplete the drift region of an LDMOS structure using only lateral electric field coupling. A baseline 180nm CMOS SOI process is utilized and RX field plate shapes are designed to result in an essentially uniform longitudinal drift region electric field satisfying the RESURF principal. We studied device scaling and the effect of varying the width and length of the angular RX field plates and their relation to impact ionization rate in both floating body and body-contacted n-channel LDMOS deices. 3D TCAD simulations were used to investigate the effect design parameters on electric field and impact ionization. Unitary 20V rated-LDMOS devices are experimentally demonstrated, verifying a LDMOS option to stacked CMOS for high voltage applications in SOI technology.