{"title":"High speed analog memory integrated circuit for Cherenkov telescopes","authors":"C. Chitu, W. Hofmann","doi":"10.1109/APASIC.1999.824097","DOIUrl":null,"url":null,"abstract":"A switched capacitor analog memory circuit for capturing fast signals from Cherenkov telescopes is described. A four channel version of the memory with 128 cells in each channel has been integrated in a 0.8 /spl mu/m complementary metal oxide semiconductor (CMOS) process with poly-to-poly capacitors. The sampling frequency generated on chip is 500 MHz and the readout frequency is 100 kHz. The measured rms cell pedestal variation in a channel after baseline subtraction is less than 10 mV across the full input signal range. The cell-to-cell gain matching is better than 1% rms, and the nonlinearity is less than 1.3% for a 1.5 V input range. The dynamic range of the memory exceeds 8 bits for a 1.5 V input voltage range.","PeriodicalId":346808,"journal":{"name":"AP-ASIC'99. First IEEE Asia Pacific Conference on ASICs (Cat. No.99EX360)","volume":"36 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1999-08-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"AP-ASIC'99. First IEEE Asia Pacific Conference on ASICs (Cat. No.99EX360)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APASIC.1999.824097","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
A switched capacitor analog memory circuit for capturing fast signals from Cherenkov telescopes is described. A four channel version of the memory with 128 cells in each channel has been integrated in a 0.8 /spl mu/m complementary metal oxide semiconductor (CMOS) process with poly-to-poly capacitors. The sampling frequency generated on chip is 500 MHz and the readout frequency is 100 kHz. The measured rms cell pedestal variation in a channel after baseline subtraction is less than 10 mV across the full input signal range. The cell-to-cell gain matching is better than 1% rms, and the nonlinearity is less than 1.3% for a 1.5 V input range. The dynamic range of the memory exceeds 8 bits for a 1.5 V input voltage range.