Low power and optimal delay multi threshold voltage level converters

Abstract

Minimizing power consumption without compromising speed in any integrated circuit (IC) is a challenge. Employing multiple supply voltages (multi-Vdd) is an effective technique to achieve this. In order to minimize the power dissipation in an integrated circuit, voltage level converter circuits are required. There are two novel multi-threshold voltage (multi-Vth) based level converters are proposed. When these novel level converters are applied in an integrated circuit and compared with the previous level converter which are of feed back based circuit. The power dissipation is decreased in this approach up to 47% and the Delay is optimized by 50% with multi threshold based level converter in a 0.18- µm technology.