Modeling and analysis of total leakage currents in nanoscale double gate devices and circuits

S. Mukhopadhyay, Keunwoo Kim, C. Chuang, K. Roy
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引用次数: 9

Abstract

In this paper we model (numerically and analytically) and analyze sub-threshold, gate-to-channel tunneling, and edge direct tunneling leakage in double gate (DG) devices. We compare the leakage of different DG structures, namely, doped body symmetric device with polysilicon gates, intrinsic body symmetric device with metal gates and intrinsic body asymmetric device with different front and back gate material. It is observed that, use of (near-mid-gap) metal gate and intrinsic body devices significantly reduces both the total leakage and its sensitivity to parametric variations in DG circuits.
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纳米双栅器件和电路中总泄漏电流的建模与分析
本文对双栅极(DG)器件的亚阈值泄漏、栅极-通道隧道泄漏和边缘直接隧道泄漏进行了数值模拟和分析。我们比较了不同DG结构,即掺杂多晶硅栅极的掺杂体对称器件、金属栅极的本构体对称器件和不同前后栅极材料的本构体非对称器件的漏量。可以观察到,在DG电路中,使用(近中隙)金属栅极和本然体器件可以显著降低总泄漏及其对参数变化的灵敏度。
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