Customizing 16-bit floating point instructions on a NIOS II processor for FPGA image and media processing

D. Etiemble, S. Bouaziz, L. Lacassagne
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引用次数: 20

Abstract

We have implemented customized SIMD 16-bit floating point instructions on a NIOS II processor. On several image processing and media benchmarks for which the accuracy and dynamic range of this format is sufficient, a speed-up ranging from 1.5 to more than 2 is obtained versus the integer implementation. The hardware overhead remains limited and is compatible with the capacities of today's FPGAs.
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在NIOS II处理器上定制用于FPGA图像和媒体处理的16位浮点指令
我们在NIOS II处理器上实现了定制的SIMD 16位浮点指令。在几个图像处理和媒体基准测试中,这种格式的精度和动态范围是足够的,与整数实现相比,可以获得1.5到2以上的加速范围。硬件开销仍然有限,并且与当今fpga的容量兼容。
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