An avoidance technique for mitigating the integer boundary spur problem in a DDS-PLL hybrid frequency synthesizer

R. Vishnu, S. S. Anulal
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引用次数: 5

Abstract

Modem frequency hopping radios makes use of Direct Digital Synthesis (DDS) - Phase Locked Loop (PLL) hybrid architecture based frequency synthesizers. The advantage is the fast switching speed and fine tuning resolution of the DDS, complemented with very low phase noise and spurious performance of the PLL. Integer boundary spur is a problem area, which restrict the spurious performance of the DDS-PLL translation loop. An algorithm was developed which identifies whether the tuned frequency is prone to integer boundary spurs. If it is, then the DDS and PLL frequencies are configured such that the generated spurs are outside the loop filter bandwidth, so that they are attenuated by the loop. The algorithm runs as a sub-routine in the micro-controller which programs the DDS and PLL. This algorithm was developed and tested on a wideband frequency synthesizer operating from 600-1200MHz, albeit the method is independent of frequency of operation.
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一种缓解DDS-PLL混合频率合成器中整数边界杂散问题的避免技术
调制解调器跳频无线电利用直接数字合成(DDS) -锁相环(PLL)混合结构的频率合成器。优点是DDS的快速开关速度和微调分辨率,以及锁相环非常低的相位噪声和杂散性能。整数边界杂散是制约DDS-PLL转换环路杂散性能的一个问题区域。提出了一种识别调谐频率是否容易产生整数边界杂散的算法。如果是,则配置DDS和PLL频率,使产生的杂散在环路滤波器带宽之外,从而由环路衰减。该算法作为子程序运行在对DDS和锁相环进行编程的单片机中。该算法在600-1200MHz的宽带频率合成器上进行了开发和测试,尽管该方法与工作频率无关。
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