T. Matsuno, K. Nishii, S. Sonetaka, Y. Toyoda, N. Iwamoto
{"title":"RF power characteristics of SiGe heterojunction bipolar transistor with high breakdown voltage structures","authors":"T. Matsuno, K. Nishii, S. Sonetaka, Y. Toyoda, N. Iwamoto","doi":"10.1109/MWSYM.2002.1011615","DOIUrl":null,"url":null,"abstract":"The collector profile dependences of RF power characteristics of SiGe HBT have been studied. A selectively ion implanted collector (SIC) structure with a thick and lightly doped collector layer showed good RF power characteristics including the adjacent-channel-power-ratio characteristics for middle class power around output power of 16 dBm while maintaining BV/sub CEO/ over 5 V. The maximum BVCEO of 9 V was obtained using the same process only by removing the SIC structure. Both structures are available to fabrication of multi-stage RF power amplifier on to one chip by single process.","PeriodicalId":299621,"journal":{"name":"2002 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium. Digest of Papers (Cat. No.02CH37280)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2002-06-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2002 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium. Digest of Papers (Cat. No.02CH37280)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MWSYM.2002.1011615","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
The collector profile dependences of RF power characteristics of SiGe HBT have been studied. A selectively ion implanted collector (SIC) structure with a thick and lightly doped collector layer showed good RF power characteristics including the adjacent-channel-power-ratio characteristics for middle class power around output power of 16 dBm while maintaining BV/sub CEO/ over 5 V. The maximum BVCEO of 9 V was obtained using the same process only by removing the SIC structure. Both structures are available to fabrication of multi-stage RF power amplifier on to one chip by single process.