Multicore speedup models using frequency scaling with fixed power budget

Seungwon Lee, Seung Hun Kim, W. Ro
{"title":"Multicore speedup models using frequency scaling with fixed power budget","authors":"Seungwon Lee, Seung Hun Kim, W. Ro","doi":"10.1109/ELINFOCOM.2014.6914403","DOIUrl":null,"url":null,"abstract":"Utilization of a core with delay faults by frequency scaling reduces performance degradation in a multicore processor. When the frequency of a delay fault core is decreased, frequencies of the rest cores can be increased within a fixed power budget since the amount of dynamic power is proportional to the clock frequency. We propose two speedup models based on modified Amdahl's law for the frequency scaling of a multicore architecture. From the models, we derive an attainable maximum speedup of a multicore processor with a delay fault core.","PeriodicalId":360207,"journal":{"name":"2014 International Conference on Electronics, Information and Communications (ICEIC)","volume":"48 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-10-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 International Conference on Electronics, Information and Communications (ICEIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ELINFOCOM.2014.6914403","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1

Abstract

Utilization of a core with delay faults by frequency scaling reduces performance degradation in a multicore processor. When the frequency of a delay fault core is decreased, frequencies of the rest cores can be increased within a fixed power budget since the amount of dynamic power is proportional to the clock frequency. We propose two speedup models based on modified Amdahl's law for the frequency scaling of a multicore architecture. From the models, we derive an attainable maximum speedup of a multicore processor with a delay fault core.
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
使用固定功率预算的频率缩放多核加速模型
在多核处理器中,通过频率缩放来利用具有延迟故障的核心可以减少性能下降。由于动态功率与时钟频率成正比,在一定的功率预算范围内,降低延时故障芯的频率,可以提高其他芯的频率。针对多核架构的频率缩放问题,提出了两种基于改进Amdahl定律的加速模型。从这些模型中,我们得到了具有延迟故障核的多核处理器可实现的最大加速。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
Automatic detection and decoding of photogrammetric coded targets Human movement detection using home network information and events on smartphones Multi-stage FIR filter design for portable digital spectrum analyzers A pose adaptive eye detection method using 3D face information Learning of social skills for Human-Robot Interaction by hierarchical HMM and interaction dynamics
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1