A Case Study on Memory Architecture Exploration for Manycores on an FPGA

Seiya Shirakuni, Ittetsu Taniguchi, H. Tomiyama
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Abstract

Due to the advances in semiconductor technologies, a recent FPGA device is capable of implementing a number of CPU cores, and manycore architecture on an FPGA attracts an increasing attention in the design of high-performance embedded systems. In embedded system design with FPGA-based manycore architectures, it is important to optimize not only the number and topology of cores but also memory architecture for each application in order to achieve high performance under limited FPGA resources. This paper presents a case study on memory architecture exploration for manycores on an FPGA. We design and implement three types of manycore architecture, together with an OpenCL-based software framework. The performance of the three architectures is evaluated based on actual measurement using various application programs.
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基于FPGA的多核存储体系结构研究
由于半导体技术的进步,最近的FPGA器件能够实现多个CPU内核,FPGA上的多核架构在高性能嵌入式系统的设计中越来越受到关注。在基于FPGA多核架构的嵌入式系统设计中,为了在有限的FPGA资源下实现高性能,不仅要优化内核数量和拓扑结构,还要优化每个应用的内存结构。本文给出了FPGA多核存储架构探索的实例研究。我们设计并实现了三种类型的多核架构,以及基于opencl的软件框架。在实际测量的基础上,利用各种应用程序对三种体系结构的性能进行了评估。
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