{"title":"Asynchronous multiple-valued VLSI system based on dual-rail current-mode differential logic","authors":"T. Hanyu, T. Saito, M. Kameyama","doi":"10.1109/ISMVL.1998.679323","DOIUrl":null,"url":null,"abstract":"This paper presents a new asynchronous data-transfer in a multi-valued current-mode VLSI circuit based on dual-rail differential logic. In the proposed 2-phase multiple-valued asynchronous communication scheme, R-valued dual-rail complementary signals are used to represent a \"data value\" while the \"spacer\" is represented as (0, 0). The sum of R-valued dual-rail complementary values is a constant (R-1) which makes it easy to distinguish a data-arrival state from a data-transition state. This scheme can be extended to any multiple-valued data representation in asynchronous communication. New basic components, a signal-state detector to detect a data-arrival state, and a current-controlled threshold detector to produce dual-rail spacer signals (0,0) are also proposed to realize a compact asynchronous control circuit. It is demonstrated that the overhead for the proposed asynchronous circuit is very small compared with the conventional synchronous multiple-valued current-mode logic approach.","PeriodicalId":377860,"journal":{"name":"Proceedings. 1998 28th IEEE International Symposium on Multiple- Valued Logic (Cat. No.98CB36138)","volume":"26 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1998-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. 1998 28th IEEE International Symposium on Multiple- Valued Logic (Cat. No.98CB36138)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISMVL.1998.679323","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
This paper presents a new asynchronous data-transfer in a multi-valued current-mode VLSI circuit based on dual-rail differential logic. In the proposed 2-phase multiple-valued asynchronous communication scheme, R-valued dual-rail complementary signals are used to represent a "data value" while the "spacer" is represented as (0, 0). The sum of R-valued dual-rail complementary values is a constant (R-1) which makes it easy to distinguish a data-arrival state from a data-transition state. This scheme can be extended to any multiple-valued data representation in asynchronous communication. New basic components, a signal-state detector to detect a data-arrival state, and a current-controlled threshold detector to produce dual-rail spacer signals (0,0) are also proposed to realize a compact asynchronous control circuit. It is demonstrated that the overhead for the proposed asynchronous circuit is very small compared with the conventional synchronous multiple-valued current-mode logic approach.