Diane-Perle Sadik, Stefanie Heinig, Keijo Jacobs, D. Johannesson, Jang-Kwon Lim, M. Nawaz, F. Dijkhuizen, M. Bakowski, S. Norrga, H. Nee
{"title":"Investigation of the surge current capability of the body diode of SiC MOSFETs for HVDC applications","authors":"Diane-Perle Sadik, Stefanie Heinig, Keijo Jacobs, D. Johannesson, Jang-Kwon Lim, M. Nawaz, F. Dijkhuizen, M. Bakowski, S. Norrga, H. Nee","doi":"10.1109/EPE.2016.7695448","DOIUrl":null,"url":null,"abstract":"The surge current capability of the body-diode of SiC MOSFETs is experimentally analyzed in order to investigate the possibility of using SiC MOSFETs for HVDC applications. SiC MOSFET discrete devices and modules have been tested with surge currents up to 10 times the rated current and for durations up to 2 ms. Although the presence of stacking faults cannot be excluded, the experiments reveal that the failure may occur due to the latch-up of the parasitic n-p-n transistor located in the SiC MOSFET.","PeriodicalId":119358,"journal":{"name":"2016 18th European Conference on Power Electronics and Applications (EPE'16 ECCE Europe)","volume":"300 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"14","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 18th European Conference on Power Electronics and Applications (EPE'16 ECCE Europe)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EPE.2016.7695448","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 14
Abstract
The surge current capability of the body-diode of SiC MOSFETs is experimentally analyzed in order to investigate the possibility of using SiC MOSFETs for HVDC applications. SiC MOSFET discrete devices and modules have been tested with surge currents up to 10 times the rated current and for durations up to 2 ms. Although the presence of stacking faults cannot be excluded, the experiments reveal that the failure may occur due to the latch-up of the parasitic n-p-n transistor located in the SiC MOSFET.