G. Roll, M. Egard, Sofia Johannson, L. Ohlsson, L. Wernersson, E. Lind
{"title":"RF reliability of gate last InGaAs nMOSFETs with high-k dielectric","authors":"G. Roll, M. Egard, Sofia Johannson, L. Ohlsson, L. Wernersson, E. Lind","doi":"10.1109/IIRW.2013.6804151","DOIUrl":null,"url":null,"abstract":"A complete reliability study of the high-frequency characteristics for nMOSFETs on InGaAs channel with Al2O3/HfO2 gate dielectric is presented. DC gate voltage stress causes an increase in the transconductance frequency dispersion. Stress induced border traps degrade the maximum DC-transconductance, but do not react at high frequencies. The main degradation characteristics of the high-frequency measurements can be modeled by the threshold voltage related transconductance shift. The maximum of the cut-off frequency is shifted with stress to higher or lower gate biases, but not decreased.","PeriodicalId":287904,"journal":{"name":"2013 IEEE International Integrated Reliability Workshop Final Report","volume":"99 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 IEEE International Integrated Reliability Workshop Final Report","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IIRW.2013.6804151","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
A complete reliability study of the high-frequency characteristics for nMOSFETs on InGaAs channel with Al2O3/HfO2 gate dielectric is presented. DC gate voltage stress causes an increase in the transconductance frequency dispersion. Stress induced border traps degrade the maximum DC-transconductance, but do not react at high frequencies. The main degradation characteristics of the high-frequency measurements can be modeled by the threshold voltage related transconductance shift. The maximum of the cut-off frequency is shifted with stress to higher or lower gate biases, but not decreased.