{"title":"A low-power design technique for digital signal processing applications","authors":"L. Varga, G. Hosszú, F. Kovács","doi":"10.1109/MELCON.2000.880061","DOIUrl":null,"url":null,"abstract":"We present a novel design technique to reduce the power consumption of the data paths. Our technique is based on the observation that a circuit can be optimally synthesized for a particular type of inputs. We use logic-level techniques to re-synthesize data path elements to be effective in terms of power dissipation. The regularity of data path elements are destroyed, however, voltage scaling can be applied, which result in power savings.","PeriodicalId":151424,"journal":{"name":"2000 10th Mediterranean Electrotechnical Conference. Information Technology and Electrotechnology for the Mediterranean Countries. Proceedings. MeleCon 2000 (Cat. No.00CH37099)","volume":"26 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-05-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2000 10th Mediterranean Electrotechnical Conference. Information Technology and Electrotechnology for the Mediterranean Countries. Proceedings. MeleCon 2000 (Cat. No.00CH37099)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MELCON.2000.880061","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
We present a novel design technique to reduce the power consumption of the data paths. Our technique is based on the observation that a circuit can be optimally synthesized for a particular type of inputs. We use logic-level techniques to re-synthesize data path elements to be effective in terms of power dissipation. The regularity of data path elements are destroyed, however, voltage scaling can be applied, which result in power savings.