{"title":"Optimizing memory BIST Address Generator implementations","authors":"A. van de Goor, H. Kukner, S. Hamdioui","doi":"10.1109/DTIS.2011.5941430","DOIUrl":null,"url":null,"abstract":"Memory Built-In Self-Test (MBIST) has become a standard industrial practice. Its quality is mainly determined by its fault detection capability in relationship to the the area overhead. The MBIST Address Generator (AG) is largely responsible for the fault detection capability, and has a significant contribution to the area overhead. This paper analyzes the properties and implementation aspects of several AGs. In addition, it presents a novel, very systematic, highspeed, low-power and low-overhead implementation, based on an Up-counter and a set of multiplexors.","PeriodicalId":409387,"journal":{"name":"2011 6th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS)","volume":"62 48","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-04-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"20","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 6th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DTIS.2011.5941430","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 20
Abstract
Memory Built-In Self-Test (MBIST) has become a standard industrial practice. Its quality is mainly determined by its fault detection capability in relationship to the the area overhead. The MBIST Address Generator (AG) is largely responsible for the fault detection capability, and has a significant contribution to the area overhead. This paper analyzes the properties and implementation aspects of several AGs. In addition, it presents a novel, very systematic, highspeed, low-power and low-overhead implementation, based on an Up-counter and a set of multiplexors.
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