Application of side-wall deposition and etch-back technology for nanometer scale device integration

Abstract

The side-wall deposition and etch-back technology is a simple method to produce nanometer scale lines and trenches or gaps. It can be used in semiconductor technology for electronic device integration. This paper reflects its application for field effect transistors in bulk silicon and demonstrates its potential for nanometer scale particle transistor integration. Silicon and ZnO nanoparticle field effect transistors using different setup structures show on/off ratios of up to 4500 and mobilities of some cm2V·1s-1. Although the best structures apply high temperature processing, a reduced temperature process for ZnO nanoparticle transistor integration on glass and foil substrates is presented.