Using simulation to improve fault coverage of analog and mixed-signal test program sets

Abstract

By using mixed-signal simulation, the test engineer can obtain the nominal operation and operational range of an analog or mixed-signal device, board, or subsystem. The engineer can also study how the Device Under Test will operate if a component were to fail. For each test, the engineer can specify a sequence of single-point, hard faults, analyze the resultant measurement data, and compare the results with previously determined test limits. Analysis of injected faults produces a Fault Table which presents a fault coverage summary of the tests in the proposed TPS. This table will allow the test engineer to evaluate the quality and fault coverage of TPSs. Using simulation, the test engineer can also analyze the results of TPSs to efficiently isolate a failure in the DUT, leading to potentially significant savings in repair times. By using simulation capabilities of the Saber simulator and the AIM scripting language, the engineer can evaluate performance of the DUT under a wide range of failure conditions without needing to exercise the DUT on the ATE tester hardware. This paper presents a methodology which allows the test engineer to modify the simulation model of the DUT to include component failure effects. Through simulation, circuit behavior is predicted as each component within the DUT is failed in a user-specified sequence. The results of this fault analysis are compiled automatically. They specify the anticipated fault coverage of the TPS and facilitate creation of a fault dictionary for later use.