An optimum design of boost power-factor-correction converter

Abstract

Designers trying to optimize the performance of boost PFC converter circuit faces many difficult circuit design issues. Most of prior researches chose the storage capacitor depending on the selected hold-up time or the output ripple percentage. Recently, the contribution of the output capacitor to the PFC system stability is highlighted. Therefore, in this issue the design steps are discussed depending on the three choices, output ripple, hold-up time and stability. It is clear that any design must take the minimum required storage capacitor as step-1 in the design and then apply for any other specification like hold-up time or ripple percentage.