Primary-side feedback control IC design for flyback converter with energy saving burst mode

C. Huang, T. Liang, Kai-Hui Chen, Cheng-Yuan Li
{"title":"Primary-side feedback control IC design for flyback converter with energy saving burst mode","authors":"C. Huang, T. Liang, Kai-Hui Chen, Cheng-Yuan Li","doi":"10.1109/APEC.2018.8341300","DOIUrl":null,"url":null,"abstract":"The advantages of the flyback converter with the primary-side regulation (PSR) are small size and high efficiency at light load. However, when the PSR flyback converter operates in burst mode, the controller is not able to sense the output information. Therefore, it is not easy to control the output voltage precisely. An integrated circuit design for AC-DC flyback converter using primary-side controller with burst mode energy saving is proposed in this paper. As the load decreases, the flyback converter operates from discontinuous conduction mode to frequency reduction mode. At extremely light load, the flyback converter operates in burst mode. With the proposed control, the burst-on time is detected by the voltage across the auxiliary winding, and the burst-off time can be estimated to control the output voltage ripple. In the proposed control circuit, a capacitor is charged by a constant current source during the burst-on time, and the capacitor voltage is transferred to a controlled current. Therefore, the required burst-off time can be obtained by using the controlled current to charge another capacitor until it reaches the reference voltage. Finally, this controller is fabricated with TSMC 0.25 μm CMOS high voltage mixed signal general purpose process. The flyback converter with the input voltage range of 90–130 Vrms, the output voltage of 15 V, and the output power of 30 W is implemented to verify the feasibility of the proposed controller.","PeriodicalId":113756,"journal":{"name":"2018 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"39 6","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-04-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 IEEE Applied Power Electronics Conference and Exposition (APEC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APEC.2018.8341300","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3

Abstract

The advantages of the flyback converter with the primary-side regulation (PSR) are small size and high efficiency at light load. However, when the PSR flyback converter operates in burst mode, the controller is not able to sense the output information. Therefore, it is not easy to control the output voltage precisely. An integrated circuit design for AC-DC flyback converter using primary-side controller with burst mode energy saving is proposed in this paper. As the load decreases, the flyback converter operates from discontinuous conduction mode to frequency reduction mode. At extremely light load, the flyback converter operates in burst mode. With the proposed control, the burst-on time is detected by the voltage across the auxiliary winding, and the burst-off time can be estimated to control the output voltage ripple. In the proposed control circuit, a capacitor is charged by a constant current source during the burst-on time, and the capacitor voltage is transferred to a controlled current. Therefore, the required burst-off time can be obtained by using the controlled current to charge another capacitor until it reaches the reference voltage. Finally, this controller is fabricated with TSMC 0.25 μm CMOS high voltage mixed signal general purpose process. The flyback converter with the input voltage range of 90–130 Vrms, the output voltage of 15 V, and the output power of 30 W is implemented to verify the feasibility of the proposed controller.
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节能型突发反激变换器的一次侧反馈控制集成电路设计
带一次侧调节(PSR)的反激变换器具有体积小、轻负载效率高等优点。然而,当PSR反激变换器工作在突发模式时,控制器无法感知输出信息。因此,精确地控制输出电压是不容易的。提出了一种采用突发节能的一次侧控制器的交-直流反激变换器的集成电路设计。随着负载的减小,反激变换器从断续导通模式工作到降频模式。在极轻的负载下,反激变换器以突发模式工作。采用该控制方法,可以通过辅助绕组上的电压来检测突发时间,并且可以估计突发时间来控制输出电压纹波。在所提出的控制电路中,电容器在突通时间内由恒流源充电,并将电容器电压转换为受控电流。因此,可以通过使用控制电流给另一个电容器充电,直到它达到参考电压来获得所需的断开时间。最后,采用台积电0.25 μm CMOS高压混合信号通用工艺制作该控制器。对输入电压范围为90 ~ 130 Vrms,输出电压为15 V,输出功率为30 W的反激变换器进行了实现,验证了所提控制器的可行性。
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