Design of a new CMOS output buffer with low switching noise

Abstract

In this paper, a new CMOS output buffer with low switching noise and load adaptability is presented. Instead of using current source, the current limiter is proposed to reduce switching noise and the static power dissipation. The output ringing is lowered by automatically turning off one driving stage near the end of the output transition. Compared with the previous designs, the proposed buffer has less switching noise and optimized output ringing and speed. Without the feedback control circuit, the proposed method is simple and easy to be implemented.