A 77μW 115dB-Dynamic-Range 586fA-Sensitivity Current-Domain Continuous-Time Zoom ADC with Pulse-Width-Modulated Resistor DAC and Background Offset Compensation Scheme

Hao Zhang, Linxiao Shen, Shichuang Zhang, Heyi Li, Yihan Zhang, Z. Tan, R. Huang, Le Ye
{"title":"A 77μW 115dB-Dynamic-Range 586fA-Sensitivity Current-Domain Continuous-Time Zoom ADC with Pulse-Width-Modulated Resistor DAC and Background Offset Compensation Scheme","authors":"Hao Zhang, Linxiao Shen, Shichuang Zhang, Heyi Li, Yihan Zhang, Z. Tan, R. Huang, Le Ye","doi":"10.1109/CICC53496.2022.9772794","DOIUrl":null,"url":null,"abstract":"High-precision large dynamic-range (DR) current-sensing front-ends are widely used in biomedical applications, such as patch-clamp, molecular concentration detection, and gene sequencing. The new gene sequencers require low-noise analog front-ends capable of sensing large DR current (>100 dB) down to sub-pA-level. At this level of precision, oversampled data converters are usually used. However, given the limited oversampling ratio in high throughput applications, it is very challenging to achieve a sub-pA-level sensitivity and >100dB DR within the limited area and energy budgets [1]. In [2], a 140dB DR is achieved using a multi-bit delta-sigma modulator (DSM), but the power consumption is over 1mW and the current sensitivity is limited to 6.3pA. An hourglass ADC achieving a 100fA sensitivity and 140dB DR is presented in [3], but is limited by conversion rate and relatively high power consumption (295μW). For a 100Hz bandwidth, its noise floor increases to 18pA.","PeriodicalId":415990,"journal":{"name":"2022 IEEE Custom Integrated Circuits Conference (CICC)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE Custom Integrated Circuits Conference (CICC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICC53496.2022.9772794","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2

Abstract

High-precision large dynamic-range (DR) current-sensing front-ends are widely used in biomedical applications, such as patch-clamp, molecular concentration detection, and gene sequencing. The new gene sequencers require low-noise analog front-ends capable of sensing large DR current (>100 dB) down to sub-pA-level. At this level of precision, oversampled data converters are usually used. However, given the limited oversampling ratio in high throughput applications, it is very challenging to achieve a sub-pA-level sensitivity and >100dB DR within the limited area and energy budgets [1]. In [2], a 140dB DR is achieved using a multi-bit delta-sigma modulator (DSM), but the power consumption is over 1mW and the current sensitivity is limited to 6.3pA. An hourglass ADC achieving a 100fA sensitivity and 140dB DR is presented in [3], but is limited by conversion rate and relatively high power consumption (295μW). For a 100Hz bandwidth, its noise floor increases to 18pA.
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
一个77μW 115db动态范围586fa灵敏度电流域连续变焦ADC,带脉宽调制电阻DAC和背景偏移补偿方案
高精度大动态范围电流传感前端广泛应用于生物医学领域,如膜片钳、分子浓度检测、基因测序等。新的基因测序仪需要低噪声的模拟前端,能够感应大DR电流(bbb100 dB)低至亚pa级。在这种精度水平上,通常使用过采样数据转换器。然而,考虑到高通量应用中有限的过采样比,在有限的面积和能量预算下实现低于pa级的灵敏度和100dB DR是非常具有挑战性的。在[2]中,使用多位δ - σ调制器(DSM)实现140dB DR,但功耗超过1mW,电流灵敏度限制在6.3pA。在[3]中提出了一种灵敏度为100fA、DR为140dB的沙漏型ADC,但受转化率和相对较高的功耗(295μW)的限制。对于100Hz带宽,其本底噪声增加到18pA。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
All Rivers Flow to the Sea: A High Power Density Wireless Power Receiver with Split-Dual-Path Rectification and Hybrid-Quad-Path Step-Down Conversion A 400-to-12 V Fully Integrated Switched-Capacitor DC-DC Converter Achieving 119 mW/mm2 at 63.6 % Efficiency A 0.14nJ/b 200Mb/s Quasi-Balanced FSK Transceiver with Closed-Loop Modulation and Sideband Energy Detection A 2GHz voltage mode power scalable RF-Front-End with 2.5dB-NF and 0.5dBm-1dBCP High-Speed Digital-to-Analog Converter Design Towards High Dynamic Range
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1