Defect-oriented cell-internal testing

Abstract

Industry is facing very high quality requirements for today's and tomorrow's ICs. Especially in the automotive market these quality requirements need to be fulfilled. To achieve this we need to improve currently used test methods and fault models to improve the overall defect coverage. This paper presents two new methodologies to significantly improve this situation. One method will focus on cell-internal Bridges over a wide range of Bridge resistor values and the second method concentrates on library cell-internal high-resistive Open defects. The fault models used during the ATPG are enhanced to directly target the layout-based intra-cell Open and Bridge defects. Both methods have been evaluated on 1500 library cells of a 65nm technology. In addition the wide range of intracell Bridges has been evaluated on 10 real industrial designs with up to 60 million faults. Various results are presented from all 1500 library cells and from the 10 industrial designs as well.