Highly Integrated Low Power Photomultiplier Readout ASIC comprising fast ADC to be used in the Antarctic Ice

Abstract

After the successful launch of IceCube, the work is currently concentrated the next generation neutrino observatory at South Pole, IceCube Gen2. The neutrino detection and post processing accuracy mostly relies on used electronic hardware. The proposed highly integrated, low power photomultiplier readout ASIC is designed for function in low temperatures of Antarctic. The microchip comprises an input pre-amplifier, a clock generator and an ADC with encoder logic featuring sampling rate of 500MHz, 6bit output accuracy with a smart extension of input related resolution up to 8bit in the area of interest. It achieves the same accuracy like a standard 8bit ADC architecture but with significantly less hardware overhead and power dissipation.