StaCS: a Static Control Superscalar architecture

MICRO 25 Pub Date : 1992-12-10 DOI:10.1145/144965.145836
B. Dinechin
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引用次数: 4

Abstract

Villeneuve St Georges cedex France bdedinechin@cri.ensmp.fr The StaCs (Static Control Superscalar) project, initiated in 1990 at the CAO-VLSI Department of the MASI Laboratory, University of Paris VI, aims to provide an advanced architectural support for compiler algorithms without compromising the efficient exploitation of VLSI technology. This has been achieved mainly by supporting a generalized form of the polycyclic property defined by Rau et al., which allows easy software pipelining of inner loops. The other distinctive characteristic of the StaCs architecture lies in the implementation of a new memory system based on the exploitation of compile-time information.
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静态控制超标量架构
StaCs(静态控制超标量)项目于1990年在巴黎第六大学MASI实验室的CAO-VLSI部门发起,旨在为编译器算法提供先进的架构支持,而不会影响VLSI技术的有效利用。这主要是通过支持Rau等人定义的多环性质的广义形式来实现的,它允许内部循环的简单软件流水线。StaCs体系结构的另一个显著特点是基于编译时信息的开发实现了一种新的存储系统。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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Dominator-path scheduling: a global scheduling method StaCS: a Static Control Superscalar architecture
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