Resistive switching random access memory — Materials, device, interconnects, and scaling considerations

Abstract

In this paper, we review recent progresses on metal oxide resistive switching memory (RRAM). RRAM device design is explored from different aspects including oxide/electrode materials, uniformity issues, and scaling down to single-digit-nm regime. We studied the stochastic nature of resistive switching in metal oxide RRAM and revealed the physics behind switching parameter variations in HfOx-based RRAM using a 2D analytical solver. In a forward-looking analysis into the sub-10 nm regime, we investigated the impact of wordline/bitline metal wire scaling on the read/write performance, energy consumption in the cross-point memory array architecture.