Benqing Guo, Jun Chen, Yao Wang, Haiyan Jin, G. Yang
{"title":"A wideband complementary noise cancelling CMOS LNA","authors":"Benqing Guo, Jun Chen, Yao Wang, Haiyan Jin, G. Yang","doi":"10.1109/RFIC.2016.7508271","DOIUrl":null,"url":null,"abstract":"A complementary noise cancelling CMOS Low-noise amplifier (LNA) for mobile DTV application with enhanced linearity is proposed. Intrinsic noise cancellation mechanism maintains acceptable NF with reduced power consumption due to current reuse principle. Complementary multi-gated transistor (MGTR) technique is further employed to null the third-order distortion and compensate second-order nonlinearity of noise cancelling stage. Implemented in a 0.18-μm CMOS process, measurement results show that the proposed LNA provides a NF of 3 dB, and a maximum gain of 17.5 dB from 0.1 to 2 GHz. An input 1-dB compression point (IP1dB) and an IIP3 of -3 dBm and 14.3 dBm, respectively, are obtained. The circuit core only draws 9.7 mA from a 2.2 V supply.","PeriodicalId":163595,"journal":{"name":"2016 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"12","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIC.2016.7508271","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 12
Abstract
A complementary noise cancelling CMOS Low-noise amplifier (LNA) for mobile DTV application with enhanced linearity is proposed. Intrinsic noise cancellation mechanism maintains acceptable NF with reduced power consumption due to current reuse principle. Complementary multi-gated transistor (MGTR) technique is further employed to null the third-order distortion and compensate second-order nonlinearity of noise cancelling stage. Implemented in a 0.18-μm CMOS process, measurement results show that the proposed LNA provides a NF of 3 dB, and a maximum gain of 17.5 dB from 0.1 to 2 GHz. An input 1-dB compression point (IP1dB) and an IIP3 of -3 dBm and 14.3 dBm, respectively, are obtained. The circuit core only draws 9.7 mA from a 2.2 V supply.