A programmable hardware accelerator for compiled electrical simulation

D. Lewis
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引用次数: 5

Abstract

A high-performance hardware accelerator is described for electrical simulation, with a speedup of over 500 for a uniprocessor. The processor addresses a variety of problems ranging from timing simulation to circuit simulation. The accelerator combines special purpose units, such as a high-speed device evaluator, with a fully programmable general-purpose processor. The specialized processors offer extremely high speed for performance-critical parts of the simulation. The general-purpose processors are optimized for compiled electrical simulation, and use a very long instruction word (VLIW) architecture. The network solution is compiled into VLIW code. The author concentrates on those features of the machine that are designed for circuit simulation algorithms, such as SPICE. A simplified example is used to expose the hardware and software techniques used to attack the problem, and estimate the performance improvement due to each technique.<>
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一个可编程的硬件加速器,用于编译电气仿真
描述了一种用于电气仿真的高性能硬件加速器,其单处理器的加速速度超过500。该处理器解决了从时序仿真到电路仿真的各种问题。该加速器结合了专用单元,如高速设备评估器和完全可编程的通用处理器。专用处理器为模拟的性能关键部分提供极高的速度。通用处理器针对编译型电子仿真进行了优化,并采用了超长指令字(VLIW)架构。网络解决方案被编译成VLIW代码。作者着重介绍了为电路仿真算法(如SPICE)而设计的机器功能。使用一个简化的示例来展示用于解决问题的硬件和软件技术,并估计由于每种技术而带来的性能改进。
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