{"title":"An On-chip Router Architecture for Dependable Multicore Processor","authors":"Kenji Kise","doi":"10.1007/978-4-431-56594-9_20","DOIUrl":null,"url":null,"abstract":"","PeriodicalId":127041,"journal":{"name":"VLSI Design and Test for Systems Dependability","volume":"62 6","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-07-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"VLSI Design and Test for Systems Dependability","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1007/978-4-431-56594-9_20","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
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