Enhanced algorithms for clock selection in a packet based synchronization method

Satheesh Kumar S, Prasanth Kemparaj
{"title":"Enhanced algorithms for clock selection in a packet based synchronization method","authors":"Satheesh Kumar S, Prasanth Kemparaj","doi":"10.1109/ISCAIE.2019.8743747","DOIUrl":null,"url":null,"abstract":"Clock selection algorithms plays an important role in selecting the best clock sources from the available pool of candidate clock sources based on many factors. Improper selection of the clock source in the network can have a detrimental impact in the network which could affect services that enables various applications in today’s next generation networks. Though the selection algorithms available as per various standard recommendations, it is important to fine tune and design a prominent method that could be adopted in packet based synchronization method. This paper addresses a new proposal for clock selection algorithms for packet based synchronization method by which the algorithm select the best clock from the candidate clocks to establish most reliable and efficient synchronization mechanism for the real-time deployments that comprises of either SyncE or 1588v2 with physical layer frequency assist as the synchronization transport. This method comprises of selecting a best clock based on the actual clock whose frequency expressed in parts per billion (ppb) seen by the Digital Phase Locked Loop (DPLL) at its inputs instead of selecting the clock based on the traditional clock selection algorithms. This method has a potential benefit of establishing a good frequency clock path throughout the network so that more efficient and reliable clock delivery is achieved within or external to the network. This paper therefore takes care of the potential delivery of bad frequency clock on legacy clock selection algorithm. Analysis and measurement results shows that the proposed method eliminate all the existing issues by conforming all the standard recommendations.","PeriodicalId":369098,"journal":{"name":"2019 IEEE 9th Symposium on Computer Applications & Industrial Electronics (ISCAIE)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 IEEE 9th Symposium on Computer Applications & Industrial Electronics (ISCAIE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISCAIE.2019.8743747","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2

Abstract

Clock selection algorithms plays an important role in selecting the best clock sources from the available pool of candidate clock sources based on many factors. Improper selection of the clock source in the network can have a detrimental impact in the network which could affect services that enables various applications in today’s next generation networks. Though the selection algorithms available as per various standard recommendations, it is important to fine tune and design a prominent method that could be adopted in packet based synchronization method. This paper addresses a new proposal for clock selection algorithms for packet based synchronization method by which the algorithm select the best clock from the candidate clocks to establish most reliable and efficient synchronization mechanism for the real-time deployments that comprises of either SyncE or 1588v2 with physical layer frequency assist as the synchronization transport. This method comprises of selecting a best clock based on the actual clock whose frequency expressed in parts per billion (ppb) seen by the Digital Phase Locked Loop (DPLL) at its inputs instead of selecting the clock based on the traditional clock selection algorithms. This method has a potential benefit of establishing a good frequency clock path throughout the network so that more efficient and reliable clock delivery is achieved within or external to the network. This paper therefore takes care of the potential delivery of bad frequency clock on legacy clock selection algorithm. Analysis and measurement results shows that the proposed method eliminate all the existing issues by conforming all the standard recommendations.
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基于包的同步方法中时钟选择的增强算法
时钟选择算法在基于多种因素的候选时钟源池中选择最佳时钟源方面起着重要作用。网络中时钟源选择不当可能会对网络产生不利影响,从而影响在当今下一代网络中实现各种应用的业务。虽然有各种标准推荐的选择算法,但重要的是要微调和设计一个突出的方法,可以在基于分组的同步方法中采用。本文提出了一种基于分组同步方法的时钟选择算法,该算法从候选时钟中选择最佳时钟,以建立最可靠和有效的同步机制,用于由SyncE或1588v2组成的实时部署,其中物理层频率辅助作为同步传输。该方法包括根据数字锁相环(DPLL)在其输入处看到的以十亿分之一(ppb)表示的实际时钟选择最佳时钟,而不是基于传统时钟选择算法选择时钟。这种方法的潜在好处是在整个网络中建立一个良好的频率时钟路径,以便在网络内部或外部实现更有效和可靠的时钟传递。因此,本文考虑了遗留时钟选择算法可能产生的坏频率时钟。分析和测量结果表明,该方法符合所有标准建议,消除了存在的所有问题。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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