Reliable Networked Reconfiguration of FPGAs with HW/SW Co-design Architecture

Abstract

Many FPGAs are served as network devices today. The ability of networked reconfiguration of such devices can enable the control and upgrading of them from a long distance. Previous researches on networked reconfiguration focused on hardware implementation of network protocols, neglecting there configuration integrity and security. This paper analyzed potential threats to reconfiguration integrity and bitstream security in network circumstances, and then addressed our hardware/software co-design solution and implementation. The proposed networked reconfiguration system made use of reliable network protocol and encryption algorithms, so it was not only easy to be implemented and operated but also secure and robust.