IC-Stripline design optimization using response surface methodology

T. Mandic, R. Gillon, A. Barić
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引用次数: 7

Abstract

This paper presents design optimization of closed version of an IC-Stripline. The geometrical parameters of the IC-Stripline are optimized in order to improve VSWR performance in the frequency range up to 6 GHz. Since the optimization performed directly in 3D EM simulator is computationally expensive, the response surface methodology (RSM) based on design of experiment (DOE) is used to develop surrogate models and to accelerate IC-Stripline design optimization. The design of experiment approach is used to systematically vary geometrical parameters of the IC-Stripline structure which are then simulated in a 3D electromagnetic simulator. The equivalent model circuit parameters are extracted according to the 3D EM simulation results. The response surface formed by the extracted parameter values is modelled using a higher order polynomial. The VSWR optimization of the IC-Stripline is performed by optimizing the equivalent circuit model having the parameters defined by the response surface models. The proposed design of the IC-Stripline shows the improvement in VSWR performance over the frequency range up to 6 GHz.
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用响应面法优化集成电路带状线设计
本文介绍了一种封闭式集成电路带状线的设计优化。优化了集成电路带状线的几何参数,提高了在6 GHz频率范围内的驻波性能。由于直接在三维仿真器中进行优化计算成本高,因此采用基于实验设计(DOE)的响应面法(RSM)建立替代模型,加速集成电路带状线设计优化。采用实验设计的方法,系统地改变ic -带状线结构的几何参数,然后在三维电磁模拟器中进行仿真。根据三维电磁仿真结果提取等效模型电路参数。提取的参数值形成的响应面采用高阶多项式建模。利用响应面模型定义的参数对等效电路模型进行优化,实现了集成电路带状线的驻波比优化。所提出的ic带状线设计在高达6 GHz的频率范围内显示出VSWR性能的改善。
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