{"title":"A V-band power amplifier with 11.9 dB gain in CMOS 90-nm process technology","authors":"M. Wu, Yen-Chung Chiang","doi":"10.1109/RFIT.2012.6401600","DOIUrl":null,"url":null,"abstract":"In this paper, a three-stage power amplifier (PA) designed for V-band applications is presented. The proposed PA adopts common-source topology for each stage and is implemented in the CMOS 90-nm process technology. This V-band PA achieves a small signal gain of 11.9dB and a saturated output power of 7.6dBm at the 60GHz operating frequency. The measured peak power added efficiency (PAE) is 4.77%, and its OP1dB is 5dBm. The power consumption of the proposed PA is 97mW from the 1.2V voltage supply.","PeriodicalId":187550,"journal":{"name":"2012 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIT.2012.6401600","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
In this paper, a three-stage power amplifier (PA) designed for V-band applications is presented. The proposed PA adopts common-source topology for each stage and is implemented in the CMOS 90-nm process technology. This V-band PA achieves a small signal gain of 11.9dB and a saturated output power of 7.6dBm at the 60GHz operating frequency. The measured peak power added efficiency (PAE) is 4.77%, and its OP1dB is 5dBm. The power consumption of the proposed PA is 97mW from the 1.2V voltage supply.
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