High-performance low-energy implementation of cryptographic algorithms on a programmable SoC for IoT devices

Boyou Zhou, Manuel Egele, A. Joshi
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引用次数: 14

Abstract

Due to severe power and timing constraints of the "things" in the Internet of things (IoT), cryptography is expensive for these devices. Custom hardware provides a viable solution. However, implementations of cryptographic algorithms in the devices need to be upgraded frequently compared to the longevity of these "things". Therefore, there is a critical need for reconfigurable, low-power and high-performance cryptography implementations for IoT devices. In this paper, we propose to use an FPGA as the reconfigurable substrate for cryptographic operations. We demonstrate our proposed approach on a Zedboard, which has two ARM cores and a Zynq FPGA. The implemented cryptographic algorithms include symmetric cryptography, asymmetric cryptography, and secure hash functions. We also integrate our cryptographic engines with the OpenSSL library to inherit the library's support for block cipher modes. Our approach shows that the FPGA-based reconfigurable cryptographic components consume between 1.8× and 4033× less energy and run between 1.6× and 2983× faster than the software implementation. At the same time, the FPGA implementation of cryptographic operations is more flexible compared to custom hardware implementations of cryptographic components.
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在物联网设备的可编程SoC上实现高性能低功耗加密算法
由于物联网(IoT)中“事物”的严格功率和时间限制,加密对于这些设备来说是昂贵的。定制硬件提供了一个可行的解决方案。然而,与这些“东西”的寿命相比,设备中加密算法的实现需要频繁升级。因此,物联网设备迫切需要可重构、低功耗和高性能的加密实现。在本文中,我们建议使用FPGA作为加密操作的可重构基板。我们在具有两个ARM内核和一个Zynq FPGA的Zedboard上演示了我们提出的方法。实现的加密算法包括对称加密、非对称加密和安全哈希函数。我们还将我们的加密引擎与OpenSSL库集成,以继承该库对分组密码模式的支持。我们的方法表明,基于fpga的可重构加密组件的能耗比软件实现低1.8到4033倍,运行速度快1.6到2983倍。同时,与自定义硬件实现的加密组件相比,FPGA实现的加密操作更加灵活。
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