High Speed Quarter Micron Buried-channel MESFETs With Improved Output Characteristics For Analog Applications

IEEE/Cornell Conference on Advanced Concepts in High Speed Semiconductor Devices and Circuits, 1987. Proceedings. Pub Date : 1987-08-10 DOI:10.1109/CORNEL.1987.721234

P. Canfield, J. Medinger, D. Allstot, L. Forbes, A.J. McCamant, B.A. Vetanen, B. Odekirk, E.P. Finchen, K. Gleason

{"title":"High Speed Quarter Micron Buried-channel MESFETs With Improved Output Characteristics For Analog Applications","authors":"P. Canfield, J. Medinger, D. Allstot, L. Forbes, A.J. McCamant, B.A. Vetanen, B. Odekirk, E.P. Finchen, K. Gleason","doi":"10.1109/CORNEL.1987.721234","DOIUrl":null,"url":null,"abstract":"GaAs MESFET technology is based in large part upon ion-implantation into The substrates are rendered semi-insulating due semi-insulating substrates. to the presence of a large concentration of electrically active deep level defects which act to compensate the material. wafers the dominate deep level is EL2, and the EL2 associated family of 17 defects. It has been shown, however, that incorporation of greater than 10 donor atoms neutralizes the EL2 defect C11. Therefore, it should be possible to build devices which are essentially free of carrier trapping in the channel of MESFETs by these deep levels. However, carriers near the channelsubstrate interface will be subject to trapping since they can be scattered into the substrate and trapped by EL2 and other defects until they are thermally emitted. behavior of the device by changing the channel-substrate space charge distribution. Likewise, surface states or defects near the surface can trap carriers and influence device behavior. In nominally undoped GaAs","PeriodicalId":247498,"journal":{"name":"IEEE/Cornell Conference on Advanced Concepts in High Speed Semiconductor Devices and Circuits, 1987. Proceedings.","volume":"8 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1987-08-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE/Cornell Conference on Advanced Concepts in High Speed Semiconductor Devices and Circuits, 1987. Proceedings.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CORNEL.1987.721234","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 3

Abstract

GaAs MESFET technology is based in large part upon ion-implantation into The substrates are rendered semi-insulating due semi-insulating substrates. to the presence of a large concentration of electrically active deep level defects which act to compensate the material. wafers the dominate deep level is EL2, and the EL2 associated family of 17 defects. It has been shown, however, that incorporation of greater than 10 donor atoms neutralizes the EL2 defect C11. Therefore, it should be possible to build devices which are essentially free of carrier trapping in the channel of MESFETs by these deep levels. However, carriers near the channelsubstrate interface will be subject to trapping since they can be scattered into the substrate and trapped by EL2 and other defects until they are thermally emitted. behavior of the device by changing the channel-substrate space charge distribution. Likewise, surface states or defects near the surface can trap carriers and influence device behavior. In nominally undoped GaAs

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具有改进输出特性的高速四分之一微米埋道mesfet模拟应用

GaAs MESFET技术在很大程度上是基于离子注入到衬底中，由于衬底是半绝缘的，所以衬底是半绝缘的。存在大量的电活性深层缺陷，这些缺陷对材料起补偿作用。晶圆片的主导深层层次是EL2，与EL2相关的缺陷族有17个。然而，研究表明，加入10个以上的供体原子可以中和EL2缺陷C11。因此，应该有可能在mesfet的通道中通过这些深电平构建基本上没有载流子捕获的器件。然而，通道衬底界面附近的载流子将受到捕获，因为它们可以分散到衬底中并被EL2和其他缺陷捕获，直到它们被热发射。通过改变通道-衬底空间电荷分布来改变器件的行为。同样，表面状态或表面附近的缺陷可以捕获载流子并影响器件的行为。名义上未掺杂的砷化镓

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IEEE/Cornell Conference on Advanced Concepts in High Speed Semiconductor Devices and Circuits, 1987. Proceedings.

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