Self-adaptive hardware architecture with parallel processing capabilities and dynamic reconfiguration

Javier Soto Vargas, J. Moreno, J. Madrenas, J. Cabestany
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引用次数: 1

Abstract

This paper describes a new self-adaptive hardware architecture with fault tolerance capabilities and a development system that allows the creation of applications. This bioinspired architecture is based on an array of cells with capacity for parallel processing, which implements in a distributed way self-adaptive capabilities, like self-routing, self-placement and runtime self-configuration. This cell array together with a component-level routing constitutes a SANE (Self-Adaptive Networked Entity). An integrated development environment and a physical prototype based on two FPGA boards has been built in order to assess the features of the proposed architecture.
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具有并行处理能力和动态重构的自适应硬件架构
本文描述了一种新的具有容错能力的自适应硬件体系结构和一个允许创建应用程序的开发系统。这种受生物启发的架构基于具有并行处理能力的细胞阵列,以分布式方式实现自适应功能,如自路由、自放置和运行时自配置。该单元阵列与组件级路由一起构成了一个自适应网络实体(Self-Adaptive Networked Entity)。为了评估所提出架构的特性,建立了基于两个FPGA板的集成开发环境和物理原型。
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Adaptive and reflective middleware for the cloudification of simulation & optimization workflows Adaptive sensing using internet-of-things with constrained communications Proceedings of the 16th Workshop on Adaptive and Reflective Middleware Self-adaptive hardware architecture with parallel processing capabilities and dynamic reconfiguration Timing analysis of a middleware-based system
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