{"title":"A fully integrated versatile PTP node","authors":"T. Muller, N. Kero","doi":"10.1109/ISPCS.2012.6336615","DOIUrl":null,"url":null,"abstract":"Today's market offers a wide variety of IEEE1588 devices implementing the Precision Time Protocol (PTP) in many different ways. This work presents a new approach of a fully integrated PTP node by focusing on three major attributes: (i) high precision in the range of a few nanoseconds, (ii) being as versatile as possible by implementing a vast part of the standard and (iii) keeping the costs of such a device as low as possible. To satisfy these goals, different ways of implementing such a device as a ready to use System-on-Chip solution are discussed. Advantages and draw-backs of several system architectures are outlined by describing all hard- and software components and finally presenting measurement results of a prototype implementation.","PeriodicalId":153925,"journal":{"name":"2012 IEEE International Symposium on Precision Clock Synchronization for Measurement, Control and Communication Proceedings","volume":"9 7","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 IEEE International Symposium on Precision Clock Synchronization for Measurement, Control and Communication Proceedings","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISPCS.2012.6336615","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
Today's market offers a wide variety of IEEE1588 devices implementing the Precision Time Protocol (PTP) in many different ways. This work presents a new approach of a fully integrated PTP node by focusing on three major attributes: (i) high precision in the range of a few nanoseconds, (ii) being as versatile as possible by implementing a vast part of the standard and (iii) keeping the costs of such a device as low as possible. To satisfy these goals, different ways of implementing such a device as a ready to use System-on-Chip solution are discussed. Advantages and draw-backs of several system architectures are outlined by describing all hard- and software components and finally presenting measurement results of a prototype implementation.