Analysis and design of low-voltage CMOS current memory cells using switched current techniques

Y. Aki, M. El-Sayed, A. K. Aboul-Seoud
{"title":"Analysis and design of low-voltage CMOS current memory cells using switched current techniques","authors":"Y. Aki, M. El-Sayed, A. K. Aboul-Seoud","doi":"10.1109/ICM.2003.238305","DOIUrl":null,"url":null,"abstract":"This paper presents a detailed temporal analysis of two-step switched current (S/sup 2/I) memory cells. Also, a new design of an SI current copier operating with a single 1V supply is presented. The analysis and design are supported and validated by SPICE simulations using 0.25 /spl mu/m CMOS process parameters.","PeriodicalId":180690,"journal":{"name":"Proceedings of the 12th IEEE International Conference on Fuzzy Systems (Cat. No.03CH37442)","volume":"47 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 12th IEEE International Conference on Fuzzy Systems (Cat. No.03CH37442)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICM.2003.238305","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1

Abstract

This paper presents a detailed temporal analysis of two-step switched current (S/sup 2/I) memory cells. Also, a new design of an SI current copier operating with a single 1V supply is presented. The analysis and design are supported and validated by SPICE simulations using 0.25 /spl mu/m CMOS process parameters.
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采用开关电流技术的低压CMOS电流存储单元的分析与设计
本文对两步开关电流(S/sup 2/I)存储单元进行了详细的时序分析。此外,本文还提出了一种单电源1V的SI电流复制器的新设计。采用0.25 /spl μ m CMOS工艺参数的SPICE仿真验证了分析和设计的正确性。
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