{"title":"CMOS Technology Compatible Magnetic Memories","authors":"V. Sverdlov, S. Selberherr","doi":"10.1109/ISNE.2019.8896421","DOIUrl":null,"url":null,"abstract":"With CMOS transistors’ scaling showing signs of saturation, an exploration of new working principles suitable for emerging microelectronic devices accelerates. The electron spin is attractive for new device applications as a complement and a possible replacement of the electron charge currently employed by CMOS. The electron spin displays the two well-defined projections on an axis and is thus suitable for digital applications. In magnetic tunnel junctions (MTJs) the free magnetic layer possesses two orientations relative to the fixed layer: parallel and antiparallel. As the parallel and antiparallel magnetization configurations are characterized by different resistances, the thereby stored information can be read. MTJs enable a spin-based type of non-volatile magnetoresistive memory. MTJs are fabricated with a CMOS-friendly process and are quite CMOS compatible. The relative magnetization configuration can be written by means of a spin-transfer torque (STT) or a spin-orbit torque (SOT) acting on the free layer. The torques are caused by spin-polarized electrical currents and not by a magnetic field. Electrically addressable non-volatile magnetoresistive memories are attractive for stand-alone and embedded applications. The state-of-the art concepts of STT and SOT memory, in particular the required modeling approaches, are reviewed, with a particular focus on a fast external magnetic field free switching in advanced SOT-MRAM.","PeriodicalId":405565,"journal":{"name":"2019 8th International Symposium on Next Generation Electronics (ISNE)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 8th International Symposium on Next Generation Electronics (ISNE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISNE.2019.8896421","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
With CMOS transistors’ scaling showing signs of saturation, an exploration of new working principles suitable for emerging microelectronic devices accelerates. The electron spin is attractive for new device applications as a complement and a possible replacement of the electron charge currently employed by CMOS. The electron spin displays the two well-defined projections on an axis and is thus suitable for digital applications. In magnetic tunnel junctions (MTJs) the free magnetic layer possesses two orientations relative to the fixed layer: parallel and antiparallel. As the parallel and antiparallel magnetization configurations are characterized by different resistances, the thereby stored information can be read. MTJs enable a spin-based type of non-volatile magnetoresistive memory. MTJs are fabricated with a CMOS-friendly process and are quite CMOS compatible. The relative magnetization configuration can be written by means of a spin-transfer torque (STT) or a spin-orbit torque (SOT) acting on the free layer. The torques are caused by spin-polarized electrical currents and not by a magnetic field. Electrically addressable non-volatile magnetoresistive memories are attractive for stand-alone and embedded applications. The state-of-the art concepts of STT and SOT memory, in particular the required modeling approaches, are reviewed, with a particular focus on a fast external magnetic field free switching in advanced SOT-MRAM.