Aihua Dong, M. Miao, J. Liou, J. Salcedo, J. Hajjar
{"title":"Novel structure embedded with dual-diodes and silicon controlled rectifier for high speed I/O applications","authors":"Aihua Dong, M. Miao, J. Liou, J. Salcedo, J. Hajjar","doi":"10.1109/INEC.2016.7589443","DOIUrl":null,"url":null,"abstract":"Design trade-offs of a novel structure embedded with a silicon controlled rectifier and dual-diode (DD-SCR) for high speed I/O applications are presented. A metal-bounded DD-SCR exhibiting a high failure current (It2), small on-state resistance (Ron), low voltage overshoot and low parasitic capacitance is introduced as an optimal device for such applications in advanced CMOS processes. Comprehensive characterizations including capacitance and current vs. voltage measured using transmission line pulsing (TLP) and very-fast TLP (VFTLP) are undertaken to demonstrate the DD-SCR performance.","PeriodicalId":416565,"journal":{"name":"2016 IEEE International Nanoelectronics Conference (INEC)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-05-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE International Nanoelectronics Conference (INEC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/INEC.2016.7589443","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
Design trade-offs of a novel structure embedded with a silicon controlled rectifier and dual-diode (DD-SCR) for high speed I/O applications are presented. A metal-bounded DD-SCR exhibiting a high failure current (It2), small on-state resistance (Ron), low voltage overshoot and low parasitic capacitance is introduced as an optimal device for such applications in advanced CMOS processes. Comprehensive characterizations including capacitance and current vs. voltage measured using transmission line pulsing (TLP) and very-fast TLP (VFTLP) are undertaken to demonstrate the DD-SCR performance.
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