V. Parthasarathy, R. Zhu, M. Ger, V. Khemka, A. Bose, R. Baird, T. Roggenbauer, D. Collins, S. Chang, P. Hui, M. Zunino
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引用次数: 8
Abstract
This paper describes a 0.35 /spl mu/m smart power technology that enables integration of a diverse set of analog and high-voltage power components in a 0.35 /spl mu/m CMOS logic platform for a broad range of voltage applications from 7 V to 50 V.
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