Full-span structural compilation of DSP hardware

Abstract

Most current silicon compilers rely on an underlying hardware function-library, thereby restricting the user to producing structural assemblies of library components. Although this gives the systems designer the power to implement function directly in silicon, it precludes the use of arbitrary cell functions that might be more suited to his application than the existing set. Moreover, should a new process become available, the cell-library must be redesigned and laid-out according to new rules, by a circuit and layout expert. An advance in structural silicon compilation, SECOND, is reported, which promises to impart flexibility and portability to cell-libraries. Through the automatic generation of layout from logical descriptions, cell-libraries may be maintained in process-independent form, and incorporate not only new components, but also new processes with ease. Implementations of user-specified chips may be in custom or semi-custom form - only physical assembly procedures differ.