{"title":"A 1.5-Gb/s equalizer with adaptive swing controller for TFT-LCD driver","authors":"Yen-Chen Lin, Ching-Yuan Yang, James Chang","doi":"10.1109/ISOCC.2017.8368878","DOIUrl":null,"url":null,"abstract":"This paper presents a 1.5 Gb/s adaptive equalizer in a 0.18μm CMOS process. The adaptive loop with swing control technique is to generate swings that match the equalizer output swings. The proposed technique can improve the adaptation accuracy without using the conventional boost tuning techniques. Besides, the band-pass and low-pass filters in the adaption loop are all made up by active circuit in order to achieve lower chip area and power consumption. The measured eye widths of 1.5 Gb/s, and 0.75 Gb/s data are 0.18, and 0.075 UI for 123-cm FR4 board, respectively. The core area is 0.28mm2 and power consumption is 46mW (including output buffer) at 1.5 Gb/s from a 1.8-V supply.","PeriodicalId":248826,"journal":{"name":"2017 International SoC Design Conference (ISOCC)","volume":"48 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 International SoC Design Conference (ISOCC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISOCC.2017.8368878","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
This paper presents a 1.5 Gb/s adaptive equalizer in a 0.18μm CMOS process. The adaptive loop with swing control technique is to generate swings that match the equalizer output swings. The proposed technique can improve the adaptation accuracy without using the conventional boost tuning techniques. Besides, the band-pass and low-pass filters in the adaption loop are all made up by active circuit in order to achieve lower chip area and power consumption. The measured eye widths of 1.5 Gb/s, and 0.75 Gb/s data are 0.18, and 0.075 UI for 123-cm FR4 board, respectively. The core area is 0.28mm2 and power consumption is 46mW (including output buffer) at 1.5 Gb/s from a 1.8-V supply.