M. M. Rahmatullah, Shoab A. Khan, Sheikh M Farhan, Habibullah Jamal
{"title":"Reconfigurable media processing system for IP based communication application","authors":"M. M. Rahmatullah, Shoab A. Khan, Sheikh M Farhan, Habibullah Jamal","doi":"10.1109/ICEEC.2004.1374391","DOIUrl":null,"url":null,"abstract":"This paper presents a novel reconfgurable media processing system for IP based communication. The system consists of multiple pDSPs specially designed for media processing applications. Though all these pDSPs are programmable and can implement all applications but they also have application spec@ instructions. The system is designed as media processing component in a multi-service access platform, which can simultaneously support multiple channels of applications like, voice, video, speech, and f a over IP on a single device. The system is mapped on a partially reconfigurable FPGA-based system. A scheduler dynamically maps pDSPs, associated software and states on the FPGA while optimizing reconfiguration time, area, power and number of channels. This innovative approach gives birth to a design paradigm where a host of applications can be dynamically mapped on smaller silicon optimizing area, power, execution time, throughput and time to market of the product.","PeriodicalId":180043,"journal":{"name":"International Conference on Electrical, Electronic and Computer Engineering, 2004. ICEEC '04.","volume":"22 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-09-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"International Conference on Electrical, Electronic and Computer Engineering, 2004. ICEEC '04.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICEEC.2004.1374391","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
This paper presents a novel reconfgurable media processing system for IP based communication. The system consists of multiple pDSPs specially designed for media processing applications. Though all these pDSPs are programmable and can implement all applications but they also have application spec@ instructions. The system is designed as media processing component in a multi-service access platform, which can simultaneously support multiple channels of applications like, voice, video, speech, and f a over IP on a single device. The system is mapped on a partially reconfigurable FPGA-based system. A scheduler dynamically maps pDSPs, associated software and states on the FPGA while optimizing reconfiguration time, area, power and number of channels. This innovative approach gives birth to a design paradigm where a host of applications can be dynamically mapped on smaller silicon optimizing area, power, execution time, throughput and time to market of the product.