Latchup test-induced failure within ESD protection diodes in a high-voltage CMOS IC product

I-Cheng Lin, Chuan-Jane Chao, M. Ker, J. Tseng, Chung-Ti Hsu, L. Leu, Yu-Lin Chen, Chia-Ku Tsai, Ren-Wen Huang
{"title":"Latchup test-induced failure within ESD protection diodes in a high-voltage CMOS IC product","authors":"I-Cheng Lin, Chuan-Jane Chao, M. Ker, J. Tseng, Chung-Ti Hsu, L. Leu, Yu-Lin Chen, Chia-Ku Tsai, Ren-Wen Huang","doi":"10.1109/EOSESD.2004.5272617","DOIUrl":null,"url":null,"abstract":"An EOS-like latchup failure occurred in a high-voltage IC product during latchup test and was identified within ESD diodes themselves. A parasitic npn bipolar formed by ESD protection diodes was trigger-activated and produced large current to result in EOS failure. This was verified by electrical measurement from TLP and curve-tracer as well as physical failure analysis. Corresponding layout solutions were proposed and solved this anomalous latchup failure successfully. Therefore ESD protection diode should be laid carefully for true latchup-robust design.","PeriodicalId":302866,"journal":{"name":"2004 Electrical Overstress/Electrostatic Discharge Symposium","volume":"43 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2004 Electrical Overstress/Electrostatic Discharge Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EOSESD.2004.5272617","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4

Abstract

An EOS-like latchup failure occurred in a high-voltage IC product during latchup test and was identified within ESD diodes themselves. A parasitic npn bipolar formed by ESD protection diodes was trigger-activated and produced large current to result in EOS failure. This was verified by electrical measurement from TLP and curve-tracer as well as physical failure analysis. Corresponding layout solutions were proposed and solved this anomalous latchup failure successfully. Therefore ESD protection diode should be laid carefully for true latchup-robust design.
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高压CMOS IC产品中ESD保护二极管的闭锁测试诱发故障
在闭锁测试过程中,在高压IC产品中发生了类似eos的闭锁故障,并在ESD二极管本身中进行了识别。由ESD保护二极管形成的寄生npn双极被触发激活并产生大电流导致EOS失效。通过张力腿腿和曲线示踪剂的电测量以及物理失效分析验证了这一点。提出了相应的布局方案,成功地解决了该异常锁紧故障。因此,要实现真正的锁存-稳健性设计,必须精心铺设ESD保护二极管。
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