Performance Improvement of QPSK MODEM in AWGN Channel Implemented in FPGA

Abstract

The paper describes a method of implementing a QPSK system in FPGA, the system being contrived in a manner where it provides an improved performance in an AWGN environment. To emulate the AWGN environment, we decided to use a method that largely resembles the Box-Muller method that generates two independent random variables with a normal distribution. The generated number sequences representing noise are then separately added to the I-channel and the Q-channel. Raised Cosine Filtering is used for the smoothening of signals. To illustrate the improvement in performance that FEC codes could provide, we use (2, 1, 7) convolutional encoding after pulse shaping, then introduce the noise, and Viterbi decoding is used to correct the errors. The entire system has been simulated using ModelSim PE Student Edition 10.4a and implemented using Xilinx XC6SLX45 Spartan 6 FPGA with the aid of ChipScope Pro software.