S. Maya-Rueda, C. Torres-Huitzil, M. Arias-Estrada
{"title":"A real-time FPGA-based architecture for optical flow computation","authors":"S. Maya-Rueda, C. Torres-Huitzil, M. Arias-Estrada","doi":"10.1109/CAMP.2003.1598166","DOIUrl":null,"url":null,"abstract":"Motion estimation of a scene is an interesting problem in computer vision since it is the basis for the dynamic analysis of a scene. However this task is computational intensive for conventional processors. In this work, a FPGA-based hardware architecture for real-time motion estimation is proposed. The technique used for motion estimation is a variation of the optical flow algorithm where the problem is reformulated as a sum of overlapped basis functions, and solved as a linear system. The proposed architecture is based on a systolic approach and is composed of parallel modules organized in a regular structure. The systolic processor accelerates the matrix operations required to achieve real-time performance. The architecture design is presented. Preliminary results are shown and discussed","PeriodicalId":443821,"journal":{"name":"2003 IEEE International Workshop on Computer Architectures for Machine Perception","volume":"212 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2003-05-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2003 IEEE International Workshop on Computer Architectures for Machine Perception","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CAMP.2003.1598166","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5
Abstract
Motion estimation of a scene is an interesting problem in computer vision since it is the basis for the dynamic analysis of a scene. However this task is computational intensive for conventional processors. In this work, a FPGA-based hardware architecture for real-time motion estimation is proposed. The technique used for motion estimation is a variation of the optical flow algorithm where the problem is reformulated as a sum of overlapped basis functions, and solved as a linear system. The proposed architecture is based on a systolic approach and is composed of parallel modules organized in a regular structure. The systolic processor accelerates the matrix operations required to achieve real-time performance. The architecture design is presented. Preliminary results are shown and discussed