{"title":"Insulator photocurrents: application to dose rate hardening of CMOS/SOI integrated circuits","authors":"E. Dupont-Nivet, Y. Coic, O. Flament, F. Tinel","doi":"10.1109/RADECS.1997.698869","DOIUrl":null,"url":null,"abstract":"Irradiation of insulators with a pulse of high energy X-rays can induce photocurrents in the interconnections of integrated circuits. We present, here, a new method to measure and analyse this effect together with a simple model. We also demonstrate that these insulator photocurrents have to be taken into account to obtain high levels of dose-rate hardness with CMOS on SOI integrated circuits, especially flip-flops or memory blocks of ASICs. We show that it explains some of the upsets observed in a SRAM embedded in an ASIC.","PeriodicalId":106774,"journal":{"name":"RADECS 97. Fourth European Conference on Radiation and its Effects on Components and Systems (Cat. No.97TH8294)","volume":"59 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1997-09-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"RADECS 97. Fourth European Conference on Radiation and its Effects on Components and Systems (Cat. No.97TH8294)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RADECS.1997.698869","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
Irradiation of insulators with a pulse of high energy X-rays can induce photocurrents in the interconnections of integrated circuits. We present, here, a new method to measure and analyse this effect together with a simple model. We also demonstrate that these insulator photocurrents have to be taken into account to obtain high levels of dose-rate hardness with CMOS on SOI integrated circuits, especially flip-flops or memory blocks of ASICs. We show that it explains some of the upsets observed in a SRAM embedded in an ASIC.