Insulator photocurrents: application to dose rate hardening of CMOS/SOI integrated circuits

E. Dupont-Nivet, Y. Coic, O. Flament, F. Tinel
{"title":"Insulator photocurrents: application to dose rate hardening of CMOS/SOI integrated circuits","authors":"E. Dupont-Nivet, Y. Coic, O. Flament, F. Tinel","doi":"10.1109/RADECS.1997.698869","DOIUrl":null,"url":null,"abstract":"Irradiation of insulators with a pulse of high energy X-rays can induce photocurrents in the interconnections of integrated circuits. We present, here, a new method to measure and analyse this effect together with a simple model. We also demonstrate that these insulator photocurrents have to be taken into account to obtain high levels of dose-rate hardness with CMOS on SOI integrated circuits, especially flip-flops or memory blocks of ASICs. We show that it explains some of the upsets observed in a SRAM embedded in an ASIC.","PeriodicalId":106774,"journal":{"name":"RADECS 97. Fourth European Conference on Radiation and its Effects on Components and Systems (Cat. No.97TH8294)","volume":"59 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1997-09-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"RADECS 97. Fourth European Conference on Radiation and its Effects on Components and Systems (Cat. No.97TH8294)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RADECS.1997.698869","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1

Abstract

Irradiation of insulators with a pulse of high energy X-rays can induce photocurrents in the interconnections of integrated circuits. We present, here, a new method to measure and analyse this effect together with a simple model. We also demonstrate that these insulator photocurrents have to be taken into account to obtain high levels of dose-rate hardness with CMOS on SOI integrated circuits, especially flip-flops or memory blocks of ASICs. We show that it explains some of the upsets observed in a SRAM embedded in an ASIC.
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
绝缘体光电流:在CMOS/SOI集成电路剂量率硬化中的应用
用高能x射线脉冲照射绝缘体可以在集成电路的互连处产生光电流。在这里,我们提出了一种测量和分析这种效应的新方法以及一个简单的模型。我们还证明,必须考虑到这些绝缘体光电流,以便在SOI集成电路上的CMOS上获得高水平的剂量率硬度,特别是触发器或asic的存储块。我们表明,它解释了在ASIC中嵌入的SRAM中观察到的一些异常。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
Proton transport through graphite composite honeycomb solar array panel Thermal- and radiation-induced interface traps in MOS devices Radiation resistance of fiberoptic components and predictive models for optical fiber systems in nuclear environments Spacecraft 3-dimensional charge deposition modelling Single event functional interrupt (SEFI) sensitivity in microcircuits
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1