C. Sohn, C. Kang, R. Baek, D. Choi, H. Sagong, E. Jeong, Jeong-Soo Lee, P. Kirsch, R. Jammy, J. Lee, Y. Jeong
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引用次数: 7
Abstract
We quantitatively compared the parasitic capacitance of the planar FETs and the DG FinFETs. Optimization with a fixed Sfin-to-Hfin ratio significantly reduces Cpara/W, which renders DG FinFETs comparable to planar FETs. Process variation on Wfin and Hfin should be controlled, otherwise, the Cpara uniformity will be worse for DG FinFETs than it is planar FETs.
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