A probabilistic analysis of resilient reconfigurable designs

A. Malek, S. Tzilis, D. Khan, I. Sourdis, Georgios Smaragdos, C. Strydis
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引用次数: 3

Abstract

Reconfigurable hardware can be employed to tolerate permanent faults. Hardware components comprising a System-on-Chip can be partitioned into a handful of substitutable units interconnected with reconfigurable wires to allow isolation and replacement of faulty parts. This paper offers a probabilistic analysis of reconfigurable designs estimating for different fault densities the average number of fault-free components that can be constructed as well as the probability to guarantee a particular availability of components. Considering the area overheads of reconfigurability, we evaluate the resilience of various reconfigurable designs with different granularities. Based on this analysis, we conduct a comprehensive design-space exploration to identify the granularity mixes that maximize the fault-tolerance of a system. Our findings reveal that mixing fine-grain logic with a coarse-grain sparing approach tolerates up to 3× more permanent faults than component redundancy and 2× more than any other purely coarse-grain solution. Component redundancy is preferable at low fault densities, while coarse-grain and mixed-grain reconfigurability maximize availability at medium and high fault densities, respectively.
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弹性可重构设计的概率分析
可重构硬件可用于容忍永久故障。组成片上系统的硬件组件可以被分割成几个可替换的单元,这些单元通过可重构的电线相互连接,以允许隔离和更换故障部件。本文对可重构设计进行了概率分析,估计了不同故障密度下可构造的无故障部件的平均数量以及保证部件可用性的概率。考虑到可重构性的面积开销,我们评估了不同粒度的可重构设计的弹性。基于此分析,我们进行了全面的设计空间探索,以确定最大限度地提高系统容错性的粒度混合。我们的研究结果表明,将细粒度逻辑与粗粒度保留方法混合在一起,可以容忍比组件冗余多3倍的永久故障,比任何其他纯粗粒度解决方案多2倍。在低故障密度下,组件冗余更可取,而粗粒度可重构性和混合粒度可重构性分别在中、高故障密度下最大化可用性。
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