Tingcong Ye, D. Vasudevan, Jiaoyan Chen, E. Popovici, M. Schellekens
{"title":"Static Average Case Power Estimation Technique for Block Ciphers","authors":"Tingcong Ye, D. Vasudevan, Jiaoyan Chen, E. Popovici, M. Schellekens","doi":"10.1109/DSD.2010.105","DOIUrl":null,"url":null,"abstract":"In this paper a new static average case dynamic power estimation technique is introduced based on the property of randomness preservation for digital circuits. The proposed technique is validated by estimating the average case power for a block cipher, DES with a lower estimation error percentage of 0.9481 % and lesser simulation time with a pattern reduction of (2^n x 2^n!)-(2^n x 2^n x 2) for n bit design. The same technique can be extended to any block cipher, including the AES and IDEA-NXT.","PeriodicalId":356885,"journal":{"name":"2010 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools","volume":"24 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DSD.2010.105","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
In this paper a new static average case dynamic power estimation technique is introduced based on the property of randomness preservation for digital circuits. The proposed technique is validated by estimating the average case power for a block cipher, DES with a lower estimation error percentage of 0.9481 % and lesser simulation time with a pattern reduction of (2^n x 2^n!)-(2^n x 2^n x 2) for n bit design. The same technique can be extended to any block cipher, including the AES and IDEA-NXT.
基于数字电路的随机性保持特性,提出了一种新的静态平均情况动态功率估计技术。通过估计分组密码的平均case功率来验证所提出的技术,对于n位设计,DES的估计错误率较低,为0.9481%,模拟时间较短,模式减少(2^n x 2^n!)-(2^n x 2^n x 2)。同样的技术可以扩展到任何分组密码,包括AES和IDEA-NXT。