{"title":"MOSAIC: A Design Methodology for VLSI Custom Circuits","authors":"J. M. C. A. Marques","doi":"10.1109/ESSCIRC.1980.5468718","DOIUrl":null,"url":null,"abstract":"In this paper a design methodology for very complex custom circuits (more than 100 000 MOS) is presented. This method is based on a multiprocessor architecture assembled from a library of modules (functional processors) interconnected by a communication kernel based on a hardware implementation of the software monitor concept.","PeriodicalId":168272,"journal":{"name":"ESSCIRC 80: 6th European Solid State Circuits Conference","volume":"3 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1980-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"ESSCIRC 80: 6th European Solid State Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSCIRC.1980.5468718","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
In this paper a design methodology for very complex custom circuits (more than 100 000 MOS) is presented. This method is based on a multiprocessor architecture assembled from a library of modules (functional processors) interconnected by a communication kernel based on a hardware implementation of the software monitor concept.
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